SWDOG=0, SCORE1=0, SLOL=0, SPOR=0, SLOC=0, SLVD=0, SSACKERR=0, SMDM_AP=0, SWAKEUP=0, SLOCKUP=0, SPIN=0, SSW=0
Sticky System Reset Status Register
| SWAKEUP | Sticky VLLS Wakeup Reset 0 (0): Reset not caused by wakeup from VLLS mode. 1 (1): Reset caused by wakeup from VLLS mode. |
| SLVD | Sticky Low-Voltage Detect Reset 0 (0): Reset not caused by LVD trip or POR 1 (1): Reset caused by LVD trip or POR |
| SLOC | Sticky Loss-of-Clock Reset 0 (0): Reset not caused by a loss of external clock. 1 (1): Reset caused by a loss of external clock. |
| SLOL | Sticky Loss-of-Lock Reset 0 (0): Reset not caused by a loss of lock in the PLL 1 (1): Reset caused by a loss of lock in the PLL |
| SWDOG | Sticky Watchdog 0 (0): Reset not caused by watchdog timeout 1 (1): Reset caused by watchdog timeout |
| SPIN | Sticky External Reset Pin 0 (0): Reset not caused by external reset pin 1 (1): Reset caused by external reset pin |
| SPOR | Sticky Power-On Reset 0 (0): Reset not caused by POR 1 (1): Reset caused by POR |
| SLOCKUP | Sticky Core Lockup 0 (0): Reset not caused by core LOCKUP event 1 (1): Reset caused by core LOCKUP event |
| SSW | Sticky Software 0 (0): Reset not caused by software setting of SYSRESETREQ bit 1 (1): Reset caused by software setting of SYSRESETREQ bit |
| SMDM_AP | Sticky MDM-AP System Reset Request 0 (0): Reset was not caused by host debugger system setting of the System Reset Request bit 1 (1): Reset was caused by host debugger system setting of the System Reset Request bit |
| SSACKERR | Sticky Stop Acknowledge Error 0 (0): Reset not caused by peripheral failure to acknowledge attempt to enter stop mode 1 (1): Reset caused by peripheral failure to acknowledge attempt to enter stop mode |
| SCORE1 | Sticky Core 1 Reset 0 (0): Reset not caused by Core 1 Reset Source. 1 (1): Reset caused by Core 1 Reset Source. |